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SPI BUS

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SPI BUS P2ROM™ series

SPI BUS P2ROM™ is implemented the interface compliant to SPI (Serial Peripheral Interface) standard. By applying the same package to all densities, it made possible to change the density without changing the PCB. There are 16Mbit to 128Mbit memory density lineup.

Part No.	Supply voltage (V)	Memory density (bit)	Configu -ration (word s×bit)	Operating(*1) frequency (MHz)		Current consumption (Max.)			Operating temper -ature (°C)	Package
Part No.	Supply voltage (V)	Memory density (bit)	Configu -ration (word s×bit)	FAST READ	READ	FAST READ	READ	Standby	Operating temper -ature (°C)	Package
MR37V12841A-□□□MP	3.0 to 3.6	128M	128M×1	33	20	30mA	20mA	50µA	0 to +70	SOP16
MR37T12841B-□□□MP (under development)	2.7 to 3.6	128M	128M×1	80/68	50	20mA	10mA	10µA	0 to +70	SOP16
MR37T12843B-□□□MP (under development)	2.7 to 3.6	128M	128M×1 /64M×2 /32M×4	80/68	50	20mA	10mA	10µA	0 to +70	SOP16
MR27V6441L-□□□MP	3.0 to 3.6	64M	64M×1	33	20	30mA	20mA	50µA	0 to +70	SOP16
MR37T6441B-□□□MP (under development)	2.7 to 3.6	64M	64M×1	80/68	50	20mA	10mA	10µA	0 to +70	SOP16
MR37T6443B-□□□MP (under development)	2.7 to 3.6	64M	64M×1 /32M×2 /16M×4	80/68	50	20mA	10mA	10µA	0 to +70	SOP16
MR27V3241L-□□□MP	3.0 to 3.6	32M	32M×1	33	20	40mA	20mA	50µA	0 to +70	SOP16
MR27V1641L-□□□MP	3.0 to 3.6	16M	16M×1	30	20	25mA	20mA	50µA	0 to +70	SOP16
MR27V6441L-□□□WA	3.0 to 3.6	64M	64M×1	33	20	30mA	20mA	50µA	0 to +70	Chip
MR27V3241L-□□□WE	3.0 to 3.6	32M	32M×1	33	20	40mA	20mA	50µA	0 to +70	Chip
MR27V1641L-□□□WA	3.0 to 3.6	16M	16M×1	30	20	25mA	20mA	50µA	0 to +70	Chip
(1): FAST-READ/READ For the details of MR27V6441L-□□□WA/MR7V3241L-□□□WE/MR27V1641L-□□□WA, please contact the sales.

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